1 Monat und dann gleich LCD 0.o das vllt doch bisschen viel aufeinmal...

Das heißt du musst die Pins nur im Quellcode anpassen. Sind deine Datenpins nicht alle am selben Port, wirds richtig schwierig da du die Bits umherspringen lassen musst, also eher auf einen halben Port die 4 DataPins anschließen und die anderen beiden können beliebig irgendwo angeschlossen werden.

Wie ist der bisherige Sachstand also Stand Verkabelung Software usw???

AtTiny26_origin.asm
Code:
;# Projekt: 								# 
;# 											#
;#											#
;# Taktfrequenz des AVR: 4 MHz	 			#
;# 											#
;# CS-SOFT 									#
;###########################################

.include "tn26def.inc"	;Tiny 26

;hier Rregisterdeklarationen
.def math1h 	= r8
.def math1l 	= r9
.def math2h 	= R10
.def math2l 	= r11
.def matherghh	= r12
.def mathergh	= r13
.def mathergl	= r14
.def mathergll	= r15

.def temp0 = r16 	; 
.def temp1 = r17 	;
.def temp2 = r18
.def temp3 = r19 	;
.def temp4 = r20
.def cnt   = r21

;Konstanten
;für UART KOM
.equ cpu	= 4000000
.equ Baud	= 9600
.equ UBRRx	= cpu/(16*Baud)-1

;Definitionen für den RAM
;**********SRAM
.equ 	erg_k		=	$0060			;erg_k wird bis zu 5 weiteren bytes genutzt sprich erg_k+5
.equ 	ocra0		=	$0065			;für T0
.equ	ocrb0		=	$0066			;für T0		
.equ 	ocra1h		=	$0067			;;;;;
.equ 	ocra1l		=	$0068			;;;;;;;; für T1 A channel
.equ 	ocrb1h		=	$0069			;;;;;
.equ 	ocrb1l		=	$006a			;;;;;;;; für T1 B channel
.equ 	icr1xh		=	$006b			;;;;;
.equ 	icr1xl		=	$006c			;;;;;;;; für T1 ICR
.equ	eep_adr		=	$006d			;eeprom
.equ	hadc		=	$006e			;High ADC 
.equ	ladc		=	$006f			;Low ADC

;ADC Deklaerationen
.equ	ADC_ddr_a	=	ddrA
.equ	ADC_Port_a	=	PortA
.equ	ADC_Pin_a	=	PinA
.equ	Chan0		=	0
.equ	Chan1		=	1
.equ	Chan2		=	2
.equ	Chan3		=	3
.equ	Chan4		=	4
.equ	Chan5		=	5
.equ	Chan6		=	6
.equ	ADC_ddr_b	=	ddrB
.equ	ADC_Port_b	=	PortB
.equ	ADC_Pin_b	=	PinB
.equ	Chan7		=	4
.equ	Chan8		=	5
.equ	Chan9		=	6
;.equ	Chan10		=	7;=RESET FINGER WEG SONST AUSGESPERRT

;***************************Einsprungadressen***********************
.cseg
.org $0000
	rjmp		stack
.org $0001		;1
	reti;rjmp	INT_0
.org $0002		;2
	reti;rjmp	I/O_pins chnage maks Interrupt
.org $0003		;3
	reti;rjmp	INT_T1_COMPa
.org $0004		;4
	reti;rjmp	INT_T1_COMPb
.org $0005		;5
	reti;rjmp	INT_T1_OVF
.org $0006		;6
	reti;rjmp	INT_T0_OVF0
.org $0007		;7
	reti;rjmp	INT_USI_Strt
.org $0008		;8
	reti;rjmp	INT_USI_OVF
.org $0009		;9
	reti;rjmp	INT_EE_rdy
.org $000a		;a
	reti;rjmp	ANA_COMP
.org $000b		;b
	reti;rjmp	ADC	

;***************************Init mit allem drumdran*****************
stack:	ldi 		temp0,low(ramend)   ;Stackpointer festlegen
        out 		sp, temp0

	;	rcall		lcd_init
	;	rcall		lcd_clear
		rcall		adc_init

Hauptprogramm:
		rcall		adc_chan_0
		rcall		start_convers
		
		rcall		adc_chan_1
		rcall		start_convers
		
		rcall		adc_chan_2
		rcall		start_convers
		
		rcall		adc_chan_3
		rcall		start_convers
		
		rcall		adc_chan_4
		rcall		start_convers
		
		rcall		adc_chan_5
		rcall		start_convers
	
		rcall		adc_chan_6
		rcall		start_convers
		
		rcall		adc_chan_7
		rcall		start_convers
		
		rcall		adc_chan_8
		rcall		start_convers
		
		rcall		adc_chan_9
		rcall		start_convers

		rjmp		Hauptprogramm

.include "adc_tiny26.asm"
;*******************************************************************
adc_tiny26.asm
Code:
/*
.equ	ADC_ddr		=	ddr?
.equ	ADC_Port	=	Port?
.equ	ADC_Pin		=	Pin?
.equ	Chan0		=	0
.equ	Chan1		=	1
.equ	Chan2		=	2
.equ	Chan3		=	3
.equ	Chan4		=	4
.equ	Chan5		=	5
.equ	ref5		=	$1312
.equ	ref256		=	$09d0
*/

;mit Interrupt
start_convers_int:
		in			temp0,adcsra	;wenn ADFR aktiv dann nur adc_read nötig für jeweiligen kanal
		ori			temp0,(0<<ADEN|1<<ADSC|0<<ADFR|1<<ADIE|1<<ADPS2|0<<ADPS1|0<<ADPS0)	;freigabe ADC Abtastrate zwischen 50Khz-200Khz Teiler=32 single mode
		out			adcsra,temp0	;
		sei
		ret

;ohne Interrupt dann abfrage auf des bits ADSC=1?????
start_convers:
		in			temp0,adcsra
		ori			temp0,(0<<ADEN|1<<ADSC|0<<ADFR|0<<ADIE|1<<ADPS2|0<<ADPS1|1<<ADPS0);freigabe der Messung	
		out			adcsra,temp0
start_convers2:					;;;
		sbic		ADCSR,ADSC		;;;;;; diese kleine routine braucht man nicht wenn man mit ints arbeitet
		rjmp		start_convers2	;;;
		in			temp0,adcl		;wichtig erst low 
		in			temp1,adch		;dann high lesen sonst erg müll
		sts			ladc,temp0
		sts			hadc,temp1
		ret

;******************************adc_interrupt**********************
adc_rdy:
		in			temp0,adcl		;wichtig erst low 
		sts			ladc,temp0
		in			temp1,adch		;dann high lesen sonst erg müll
		sts			hadc,temp1
		reti


;***********************adc_init*****************************
adc_init:
		ldi			temp0,(0<<Chan6|0<<Chan5|0<<Chan4|0<<Chan3|0<<Chan2|0<<Chan1|0<<Chan0)
		out			ADC_ddr_a,temp0
		ldi			temp0,(0<<Chan6|0<<Chan5|0<<Chan4|0<<Chan3|0<<Chan2|0<<Chan1|0<<Chan0)
		out			ADC_Pin_a,temp0

		ldi			temp0,(0<<Chan9|0<<Chan8|0<<Chan7)
		out			ADC_ddr_b,temp0
		ldi			temp0,(0<<Chan9|0<<Chan8|0<<Chan7)
		out			ADC_ddr_b,temp0

		in			temp0,adcsra
		ori			temp0,(1<<ADEN|0<<ADSC|0<<ADFR|0<<ADIE|1<<ADPS2|0<<ADPS1|1<<ADPS0)	;	
		out			adcsra,temp0
	
		rcall		adc_ref_5V

		ret

;*********************AREF
adc_ref_5V:			;AVCC on	
		in			temp0,admux
		andi		temp0,(0<<REFS1|0<<REFS0|1<<ADLAR|1<<MUX4|1<<MUX3|1<<MUX2|1<<MUX1|1<<MUX0)
		ori			temp0,(0<<REFS1|0<<REFS0|0<<ADLAR|1<<MUX4|1<<MUX3|1<<MUX2|1<<MUX1|1<<MUX0)	;AVCC with external capacitor at AREF pin
		out			admux,temp0		
		ret

adc_ref_extern:		;AREexternF	
		in			temp0,admux
		andi		temp0,(0<<REFS1|0<<REFS0|1<<ADLAR|1<<MUX4|1<<MUX3|1<<MUX2|1<<MUX1|1<<MUX0)
		ori			temp0,(0<<REFS1|1<<REFS0|0<<ADLAR|1<<MUX4|1<<MUX3|1<<MUX2|1<<MUX1|1<<MUX0)	;AVCC with external capacitor at AREF pin
		out			admux,temp0		
		ret

adc_ref_256V1:		;2,56V on
		in			temp0,admux
		andi		temp0,(0<<REFS1|0<<REFS0|1<<ADLAR|1<<MUX4|1<<MUX3|1<<MUX2|1<<MUX1|1<<MUX0)
		ori			temp0,(1<<REFS1|0<<REFS0|0<<ADLAR|1<<MUX4|1<<MUX3|1<<MUX2|1<<MUX1|1<<MUX0)	;AVCC with external capacitor at AREF pin
		out			admux,temp0		
		ret

adc_ref_256V2:		;extern on
		in			temp0,admux
		andi		temp0,(0<<REFS1|0<<REFS0|1<<ADLAR|1<<MUX4|1<<MUX3|1<<MUX2|1<<MUX1|1<<MUX0)
		ori			temp0,(1<<REFS1|1<<REFS0|0<<ADLAR|1<<MUX4|1<<MUX3|1<<MUX2|1<<MUX1|1<<MUX0)	;AVCC with external capacitor at AREF pin
		out			admux,temp0		
		ret

;*******************Channels**************************************************************************************
adc_chan_0:
		in			temp0,admux
		andi		temp0,(1<<REFS1|1<<REFS0|1<<ADLAR|0<<MUX4|0<<MUX3|0<<MUX2|0<<MUX1|0<<MUX0)
		ori			temp0,(0<<REFS1|0<<REFS0|0<<ADLAR|0<<MUX4|0<<MUX3|0<<MUX2|0<<MUX1|0<<MUX0)	
		out			admux,temp0	
		ret

adc_chan_1:
		in			temp0,admux
		andi		temp0,(1<<REFS1|1<<REFS0|1<<ADLAR|0<<MUX4|0<<MUX3|0<<MUX2|0<<MUX1|0<<MUX0)
		ori			temp0,(0<<REFS1|0<<REFS0|0<<ADLAR|0<<MUX4|0<<MUX3|0<<MUX2|0<<MUX1|1<<MUX0)	
		out			admux,temp0	
		ret

adc_chan_2:
		in			temp0,admux
		andi		temp0,(1<<REFS1|1<<REFS0|1<<ADLAR|0<<MUX4|0<<MUX3|0<<MUX2|0<<MUX1|0<<MUX0)
		ori			temp0,(0<<REFS1|0<<REFS0|0<<ADLAR|0<<MUX4|0<<MUX3|0<<MUX2|1<<MUX1|0<<MUX0)	
		out			admux,temp0	
		ret

adc_chan_3:
		in			temp0,admux
		andi		temp0,(1<<REFS1|1<<REFS0|1<<ADLAR|0<<MUX4|0<<MUX3|0<<MUX2|0<<MUX1|0<<MUX0)
		ori			temp0,(0<<REFS1|0<<REFS0|0<<ADLAR|0<<MUX4|0<<MUX3|0<<MUX2|1<<MUX1|1<<MUX0)	
		out			admux,temp0	
		ret

adc_chan_4:
		in			temp0,admux
		andi		temp0,(1<<REFS1|1<<REFS0|1<<ADLAR|0<<MUX4|0<<MUX3|0<<MUX2|0<<MUX1|0<<MUX0)
		ori			temp0,(0<<REFS1|0<<REFS0|0<<ADLAR|0<<MUX4|0<<MUX3|1<<MUX2|0<<MUX1|0<<MUX0)	
		out			admux,temp0	
		ret

adc_chan_5:
		in			temp0,admux
		andi		temp0,(1<<REFS1|1<<REFS0|1<<ADLAR|0<<MUX4|0<<MUX3|0<<MUX2|0<<MUX1|0<<MUX0)
		ori			temp0,(0<<REFS1|0<<REFS0|0<<ADLAR|0<<MUX4|0<<MUX3|1<<MUX2|0<<MUX1|1<<MUX0)	
		out			admux,temp0	
		ret

adc_chan_6:
		in			temp0,admux
		andi		temp0,(1<<REFS1|1<<REFS0|1<<ADLAR|0<<MUX4|0<<MUX3|0<<MUX2|0<<MUX1|0<<MUX0)
		ori			temp0,(0<<REFS1|0<<REFS0|0<<ADLAR|0<<MUX4|0<<MUX3|1<<MUX2|1<<MUX1|0<<MUX0)	
		out			admux,temp0	
		ret

adc_chan_7:
		in			temp0,admux
		andi		temp0,(1<<REFS1|1<<REFS0|1<<ADLAR|0<<MUX4|0<<MUX3|0<<MUX2|0<<MUX1|0<<MUX0)
		ori			temp0,(0<<REFS1|0<<REFS0|0<<ADLAR|0<<MUX4|0<<MUX3|1<<MUX2|1<<MUX1|1<<MUX0)	
		out			admux,temp0	
		ret

adc_chan_8:
		in			temp0,admux
		andi		temp0,(1<<REFS1|1<<REFS0|1<<ADLAR|0<<MUX4|0<<MUX3|0<<MUX2|0<<MUX1|0<<MUX0)
		ori			temp0,(0<<REFS1|0<<REFS0|0<<ADLAR|0<<MUX4|1<<MUX3|0<<MUX2|0<<MUX1|0<<MUX0)	
		out			admux,temp0	
		ret

adc_chan_9:
		in			temp0,admux
		andi		temp0,(1<<REFS1|1<<REFS0|1<<ADLAR|0<<MUX4|0<<MUX3|0<<MUX2|0<<MUX1|0<<MUX0)
		ori			temp0,(0<<REFS1|0<<REFS0|0<<ADLAR|0<<MUX4|1<<MUX3|0<<MUX2|0<<MUX1|1<<MUX0)	
		out			admux,temp0	
		ret

adc_chan_BG:
		in			temp0,admux
		andi		temp0,(1<<REFS1|1<<REFS0|1<<ADLAR|0<<MUX4|0<<MUX3|0<<MUX2|0<<MUX1|0<<MUX0)
		ori			temp0,(0<<REFS1|0<<REFS0|0<<ADLAR|1<<MUX4|1<<MUX3|1<<MUX2|1<<MUX1|0<<MUX0)
		out			admux,temp0	
		ret

adc_chan_GND:
		in			temp0,admux
		andi		temp0,(1<<REFS1|1<<REFS0|1<<ADLAR|0<<MUX4|0<<MUX3|0<<MUX2|0<<MUX1|0<<MUX0)
		ori			temp0,(0<<REFS1|0<<REFS0|0<<ADLAR|1<<MUX4|1<<MUX3|1<<MUX2|1<<MUX1|1<<MUX0)
		out			admux,temp0	
		ret