Sooo nun bin ich wieder erwacht :-P

Hier mal mein aktueller Quellcode. Ich mache mit großer Sicherheit irgendwas ganz gravierendes falsch...

Code:
#define F_CPU 16000000

#define RC5_HALF_BIT_TIME 8 // 8 * 111µs = 888µs

#define RC5_SEND_ON        PORTD |=  (1<<PD1)
#define RC5_SEND_OFF    PORTD &= ~(1<<PD1)

#include <avr/io.h>
#include <avr/interrupt.h>
#include <util/delay.h>
#include <stdbool.h>


void rc5_send_command(uint16_t command);
void rc5_send_one(void);
void rc5_send_zero(void);
void delay_880(void);

volatile static uint8_t modulation, rc5_half_bit_cnt, rc5_state;

uint16_t rc5_byte = 0x00;

int main(void)
{
    DDRB |= (1<<PB7);
    DDRD |= (1<<PD1);
    
    TCCR0A  = (1<<WGM01);  // CTC
    TCCR0B  = (1<<CS01);   // 8 ( ca. 111µs @ 8 MHz )
    TCCR1B  = (1<<CS10);   // 1 ( ca. 36 kHz @ 8 MHz )
    TCCR1B |= (1<<WGM12);  // CTC
    TIMSK0  = (1<<OCIE0A); // OutputCompare0A
    TIMSK1  = (1<<OCIE1A); // OutputCompare1A

    OCR0A  = (0x6E);
    OCR1A  = (0x00DD);

    sei();
    

            
    while(1)
    {
        rc5_send_command(0b11000000001100);            
    }
}

/* send a 14 bit command to the IR - Receiver */
void rc5_send_command(uint16_t command)
{
    uint16_t send_byte = command;
    
    for (uint16_t x = 0 ; x < 14 ; x++)
    {
        if (send_byte & 0x8000)
        {
            rc5_send_one();
        }
        else
        {
            rc5_send_zero();
        }
        send_byte <<= 0x0001;
    }
}

/* send a logical one to the Receiver ( 1 --> 0 ) */
void rc5_send_one(void)
{
    rc5_state &= ~(0x40);
    delay_880();
    rc5_state |=  (0x40);
    delay_880();
}

/* send a logical zero to the  Receiver ( 0 --> 1 ) */
void rc5_send_zero(void)
{
    rc5_state |= (0x40); // led on
    delay_880();    
    rc5_state &= ~(0x40); // led off
    delay_880();
}

void delay_880(void)
{
    while(1)
    {
        if ((rc5_state & 0x01) == 0x01)
        {
            rc5_half_bit_cnt = 0x00;
            rc5_state = 0x00;
            break;
        }
    }
}

/* called every 111 µs */
ISR(TIMER0_COMPA_vect)
{
    rc5_half_bit_cnt++;
    
    if (rc5_half_bit_cnt >= RC5_HALF_BIT_TIME)
    {
        rc5_half_bit_cnt = 0x00;
        rc5_state |= 0x01;            
    }
}

/* called every 0,0278 ms */
ISR(TIMER1_COMPA_vect)
{
    if ((rc5_state & 0x40) == 0x40)
    {
        RC5_SEND_ON;
    }
    else
    {
        RC5_SEND_OFF;
    }
}