So was?
Da lege ich result und op1 ins gleiche reg (vermeidet kopieren)
Code:
#include <avr/io.h>

uint16_t fadd (uint8_t op1, uint8_t op2)
{
	uint16_t result;
   // op1 in 16bit register laden
   // op2 mit carry aufaddieren und Ergebnis zurück geben
	
   asm volatile (
		"clr %B0" "\n\t"
		"add %A0, %3" "\n\t"
		"adc %B0, __zero_reg__"
			: "=r" (result), "=r" (op1)
			: "0" (op1), "r" (op2)
		);

   return result;
} 

uint16_t result;

void main()
{
   uint8_t op1 = 10;
   uint8_t op2 = 250;

   //uint16_t result = 0;

   result = fadd( op1, op2 );
}
Code:
	.file	"random-leds.c"
	.arch atmega8
__SREG__ = 0x3f
__SP_H__ = 0x3e
__SP_L__ = 0x3d
__tmp_reg__ = 0
__zero_reg__ = 1
	.global __do_copy_data
	.global __do_clear_bss
	.text
.global	fadd
	.type	fadd, @function
fadd:
/* prologue: frame size=0 */
/* prologue end (size=0) */
/* #APP */
	clr r25
	add r24, r22
	adc r25, __zero_reg__
/* #NOAPP */
/* epilogue: frame size=0 */
	ret
/* epilogue end (size=1) */
/* function fadd size 7 (6) */
	.size	fadd, .-fadd
.global	main
	.type	main, @function
main:
/* prologue: frame size=0 */
	ldi r28,lo8(__stack - 0)
	ldi r29,hi8(__stack - 0)
	out __SP_H__,r29
	out __SP_L__,r28
/* prologue end (size=4) */
	ldi r22,lo8(-6)	 ;  12	*movqi/2	[length = 1]
	ldi r24,lo8(10)	 ;  13	*movqi/2	[length = 1]
	rcall fadd	 ;  14	call_value_insn/3	[length = 1]
	sts (result)+1,r25	 ;  16	*movhi/3	[length = 4]
	sts result,r24
/* epilogue: frame size=0 */
	rjmp exit
/* epilogue end (size=1) */
/* function main size 12 (7) */
	.size	main, .-main
.global	result
.global	result
	.section .bss
	.type	result, @object
	.size	result, 2
result:
	.skip 2,0
::EDIT::


Mit result in eigenem Register sieht's so aus:

Code:
uint16_t fadd (uint8_t op1, uint8_t op2)
{
	uint16_t result;
   // op1 in 16bit register laden
   // op2 mit carry aufaddieren und Ergebnis zurück geben
	
   asm volatile (
		"clr %B0" "\n\t"
		"add %A0, %2" "\n\t"
		"adc %B0, __zero_reg__"
			: "=&r" (result)
			: "0" (op1), "r" (op2)
		);

   return result;
}
Code:
fadd:
	mov r18,r24	 ;  30	*movqi/1	[length = 1]
/* #APP */
	clr r19
	add r18, r22
	adc r19, __zero_reg__
/* #NOAPP */
	movw r24,r18	 ;  31	*movhi/1	[length = 1]
	ret