ATmega16 Bibliothek

**avr_racer** · 18.08.2015, 17:09

Bib für den ATmega16, kompatible Includes sind GRÜN gekennzeichnet und können aus der ATMEGA8 Bibliothek übernommen werden.

mega16.asm

Code:

;###########################################
;# Projekt: 								# 
;# 											#
;#											#
;# Taktfrequenz des AVR: 4 MHz	 			#
;# 											#
;# CS-SOFT 									#
;###########################################

.include "m16def.inc"	;Atmega16

.def math1h 	= r8
.def math1l 	= r9
.def math2h 	= R10
.def math2l 	= r11
.def matherghh	= r12
.def mathergh	= r13
.def mathergl	= r14
.def mathergll	= r15

.def temp0	= r16 	; 
.def temp1	= r17 	;
.def temp2	= r18
.def temp3	= r19 	;
.def temp4	= r20
.def cnt	= r21

.equ cpu	= 4000000
.equ Baud	= 9600
.equ UBRRx	= cpu/(16*Baud)-1

;**********LCD Port mit 74HC164
.equ port_lcd_x = 	portc		
.equ ddrx_lcd_x = 	ddrc
;				Pinbelegungen
        ;		   STD
.equ SClock		= 	4		;LCD	;;;
.equ SRS		=	4
.equ SData		= 	5		;74164	;;;;;so Kann die HW angeschlossen sein
.equ SRW		=	5
.equ Light		= 	6		;LCD	;;;;;
.equ SEnable	= 	7		;74164	;;;
/*
;********* parallel für LCD/Simulationssoftware*************
.equ st_port_lcd_x = portb
.equ st_ddrx_lcd_x = ddrb
;                  STD		;
.equ RS			=	4		;
.equ RW			=	5
*/
;Entry Set
.equ SH			=	0 ;1 = Display shift	0 = not shifted
.equ ID			=	1 ;1 = increase 		0 = decrease
.equ HES		=	2 ;immer 1 setzen Symbolisiert das Ende 
                      ;des Commandos
;DISPLAY on/off
.equ B			=	0 ;1 = Blink 		0 = no Blink
.equ C			=	1 ;1 = Cursor on 	0 = Cursor off
.equ D			=	2 ;1 = Disp on		0 = Disp off
.equ HD			=	3 ;immer 1 setzen Symbolisiert das Ende 
                      ;des Commandos
;Shift
.equ RL			=	2 ;1 = right shift	0 = left shift
.equ SC			=	3 ;1 = Disp shift	0 = Cursor move
.equ HS			=	4 ;immer 1 setzen Symbolisiert das Ende 
                      ;des Commandos
;SET Function
.equ F			=	2 ;1 = 5x10			0 = 5x7
.equ N			=	3 ;1 = 2line(4line)	0 = 1line
.equ DL			=	4 ;1 = 8bit int		0 = 4bit interface
.equ HSF		=	5 ;immer 1 setzen Symbolisiert das Ende 
                      ;des Commandos
;**********interner ADC
.equ	ADC_ddr		=	ddrA
.equ	ADC_Port	=	PortA
.equ	ADC_Pin		=	PinA
.equ	Chan0		=	0
.equ	Chan1		=	1
.equ	Chan2		=	2
.equ	Chan3		=	3
.equ	Chan4		=	4
.equ	Chan5		=	5
.equ	Chan6		=	6
.equ	Chan7		=	7
.equ	ref5		=	$1312
.equ	ref256		=	$09d0

;**********SRAM
.equ 	erg_k		=	$0060			;erg_k wird bis zu 5 weiteren bytes genutzt sprich erg_k+5
.equ	ocr0s		=	$0065
.equ 	ocr2s		=	$0066			;für T2
.equ 	ocra1h		=	$0067			;;;;;
.equ 	ocra1l		=	$0068			;;;;;;;; für T1 A channel
.equ 	ocrb1h		=	$0069			;;;;;
.equ 	ocrb1l		=	$006a			;;;;;;;; für T1 B channel
.equ 	icr1xh		=	$006b			;;;;;
.equ 	icr1xl		=	$006c			;;;;;;;; für T1 ICR
.equ	hadc		=	$006d			;adc
.equ	ladc		=	$006e			;adc

.equ	eep_adrh	=	$0070			;eeprom
.equ	eep_adrl	=	$0071			;eeprom
.equ	LTC_wertH	=	$0072
.equ	LTC_wertL	=	$0073
.equ	Poti0		=	$0074			;Potentiometer 0
.equ	ploudr		=	$0075			;poti für lautstärke rechts
.equ	ploudl		=	$0076			;poti für lautstärke links
.equ	phigh		=	$0077			;poti für höhen		
.equ	pbass		=	$0078			;poti für bass

;***************************Einsprungadressen***********************
.cseg
.org $0000
	rjmp	stack
.org $0002			;2
	reti;rjmp	INT_0
.org $0004			;4
	reti;rjmp	INT_1
.org $0006			;6
	reti;rjmp	INT_OC2
.org $0008			;8
	reti;rjmp	INT_OVF2
.org $000a			;a
	reti;rjmp	INT_ICP1
.org $000c			;c
	reti;rjmp	INT_OC1A
.org $000e			;e
	reti;rjmp	INT_OC1B
.org $0010			;10
	reti;rjmp	INT_OVF1
.org $0012			;12
	reti;rjmp	INT_OVF0
.org $0014			;14
	reti		;keine SPI Routinen
.org $0016			;16
	reti;rjmp	INT_URXC
.org $0018			;18
	reti;rjmp	INT_UDRE
.org $001a			;1a
	reti;rjmp	INT_UTXC
.org $001c			;1c
	reti;rjmp	INT_adc_rdy
.org $001e			;1e
	reti;rjmp	INT_eeprom_rdy
.org $0020			;20
	reti;rjmp	INT_ac
.org $0022			;22
	reti		;keine 2wireRoutinen
.org $0024			;24
	reti;rjmp	INT_2
.org $0026			;26
	reti;rjmp	INT_OC0    
.org $0028			;28
	reti		;keine SPMRoutinen
		
		

;***************************Init mit allem drumdran*****************
stack:	ldi 		temp1,high(ramend)  ;Stackpointer festlegen
	    out 		sph, temp1
		ldi 		temp1,low(ramend)   ;Stackpointer festlegen
        out 		spl, temp1
	;	rcall		sram

		rcall		lcd_init
		rcall		lcd_clear
		rcall		werbe1
	;	rcall		werbe2
	;	rcall		wait1s		
	;	rcall		leer_z

	;	rcall		eeprom_init			;wenn ints bevorzugt werden	
	;	rcall		eeprom_read
	;	rcall		eeprom_write
	;	rcall		adr_cnt

	;	rcall		INIT_ext_Int012
	;	rcall		deak_int01	
	
		rcall		adc_init
	
	;	rcall		AC_init
	;	rcall		ac_change
	
	;	rcall		mode3_t0_init
	;	rcall		prescaler_T0_on

	;	rcall		mode0_t1_init
	;	rcall		prescaler_T1_on

	;	rcall		usart_init			;wenn INT bevorzugt dann hier aktivieren und prog erweitern 
		

start:	
		rjmp		start


;*************************weitere*includedata***********************
.include "AtMega16_adc_lst.asm"
.include "AtMega16_analogcomparator.asm"
.include "AtMega16_eeprom.asm"
.include "AtMega16_ext_ints.asm"
.include "AtMega16_timercounter.asm"
.include "AtMega16_uart_std.asm"
.include "AtMega16_LCD_Txt_out.asm"
.include "AtMega16_RS_Txt_out.asm"

.include "l:\etronik\Software3\sonstiges\origin\mathe.asm"
.include "l:\etronik\Software3\sonstiges\origin\lcd_KS0066_KS0070_8bit.asm"
.include "l:\etronik\Software3\sonstiges\origin\zeitschleifen.asm"
.include "l:\etronik\Software3\sonstiges\origin\hex_dez_wandlung.asm" 		;gebraucht für LCD oder nur umwandlung

AtMega16_adc_lst.asm

Code:

/*
.equ	ADC_ddr		=	ddrc
.equ	ADC_Port	=	Portc
.equ	ADC_Pin		=	PinC
.equ	Chan0		=	0
.equ	Chan1		=	1
.equ	Chan2		=	2
.equ	Chan3		=	3
.equ	Chan4		=	4
.equ	Chan5		=	5
.equ	Chan6		=	6
.equ	Chan7		=	7
*/
;******************************adc_interrupt**********************
adc_rdy:
		in			temp0,adcl		;wichtig erst low 
		sts			ladc,temp0
		in			temp1,adch		;dann high lesen sonst erg müll
		sts			hadc,temp1
		reti

;***********************adc_header**************************
adc_header:
		rcall		adc_init
		rcall		start_convers_int	;mit Interrupt
		;rcall		start_convers		;ohne Interrupt
		ret

;***********************adc_init*****************************
adc_init:
		in			temp0,ADC_ddr
		ori			temp0,(0<<Chan7|0<<Chan6|0<<Chan5|0<<Chan4|0<<Chan3|0<<Chan2|0<<Chan1|0<<Chan0)
		out			ADC_ddr,temp0

		in			temp0,ADCSRA
		ori			temp0,(1<<ADEN|0<<ADSC|0<<ADATE|0<<ADIE|1<<ADPS2|0<<ADPS1|1<<ADPS0)	;	
		out			ADCSRA,temp0

		rcall		adc_ref_5V							;5V Referenz Channel 0

		in			temp0,SFIOR							;TriggerSource
		ori			temp0,(0<<ADTS2|0<<ADTS1|0<<ADTS0)	;Man beachte ADATE=0 dann keine Auswirkung auf SFIOR
		out			SFIOR,temp0	

		ret

;***********************Wandlung starten******************************************************
;mit Interrupt
start_convers_int:
		in			temp0,ADCSRA	;wenn ADFR aktiv dann nur adc_read nötig für jeweiligen kanal
		ori			temp0,(0<<ADEN|1<<ADSC|0<<ADATE|1<<ADIE|1<<ADPS2|0<<ADPS1|0<<ADPS0)	;freigabe ADC Abtastrate zwischen 50Khz-200Khz Teiler=32 single mode
		out			ADCSRA,temp0	;
		sei
		ret

;ohne Interrupt dann abfrage auf des bits ADSC=1?????
start_convers:
		in			temp0,adcsra
		ori			temp0,(0<<ADEN|1<<ADSC|0<<ADATE|0<<ADIE|1<<ADPS2|0<<ADPS1|1<<ADPS0);freigabe der Messung	
		out			adcsra,temp0
start_convers2:					;;;
		sbic		ADCSR,ADSC		;;;;;; diese kleine routine braucht man nicht wenn man mit ints arbeitet
		rjmp		start_convers2	;;;
		in			temp0,adcl		;wichtig erst low 
		in			temp1,adch		;dann high lesen sonst erg müll
		sts			ladc,temp0
		sts			hadc,temp1
		ret

;*********************AREF
adc_ref_extern:		;extern on
		in			temp0,admux
		andi		temp0,(0<<REFS1|0<<REFS0|1<<ADLAR|0<<MUX4|1<<MUX3|1<<MUX2|1<<MUX1|1<<MUX0)
		ori			temp0,(0<<REFS1|0<<REFS0|0<<ADLAR|0<<MUX4|0<<MUX3|0<<MUX2|0<<MUX1|0<<MUX0)	;AVCC with external capacitor at AREF pin
		out			admux,temp0		
		ret

adc_ref_5V:			;AVCC on	
		in			temp0,admux
		andi		temp0,(0<<REFS1|0<<REFS0|1<<ADLAR|0<<MUX4|1<<MUX3|1<<MUX2|1<<MUX1|1<<MUX0)
		ori			temp0,(0<<REFS1|1<<REFS0|0<<ADLAR|0<<MUX4|0<<MUX3|0<<MUX2|0<<MUX1|0<<MUX0)	;AVCC with external capacitor at AREF pin
		out			admux,temp0		
		ret
/*
adc_ref_reserve:	;reserve
		in			temp0,admux
		ori			temp0,(1<<REFS1|0<<REFS0|0<<ADLAR|0<<MUX3|0<<MUX2|0<<MUX1|0<<MUX0)	;AVCC with external capacitor at AREF pin
		out			admux,temp0		
		ret
*/
adc_ref_256V:		;2,56V on
		in			temp0,admux
		andi		temp0,(0<<REFS1|0<<REFS0|1<<ADLAR|0<<MUX4|1<<MUX3|1<<MUX2|1<<MUX1|1<<MUX0)
		ori			temp0,(1<<REFS1|1<<REFS0|0<<ADLAR|0<<MUX4|0<<MUX3|0<<MUX2|0<<MUX1|0<<MUX0)	;AVCC with external capacitor at AREF pin
		out			admux,temp0		
		ret

;*******************Channels**************************************************************************************
adc_chan_0:
		in			temp0,admux
		andi		temp0,(1<<REFS1|1<<REFS0|1<<ADLAR|0<<MUX4|0<<MUX3|0<<MUX2|0<<MUX1|0<<MUX0)
		ori			temp0,(0<<REFS1|1<<REFS0|0<<ADLAR|0<<MUX4|0<<MUX3|0<<MUX2|0<<MUX1|0<<MUX0)	;AVCC with external capacitor at AREF pin
		out			admux,temp0	
		ret

adc_chan_1:
		in			temp0,admux
		andi		temp0,(1<<REFS1|1<<REFS0|1<<ADLAR|0<<MUX4|0<<MUX3|0<<MUX2|0<<MUX1|0<<MUX0)
		ori			temp0,(0<<REFS1|1<<REFS0|0<<ADLAR|0<<MUX4|0<<MUX3|0<<MUX2|0<<MUX1|1<<MUX0)	;AVCC with external capacitor at AREF pin
		out			admux,temp0	
		ret

adc_chan_2:
		in			temp0,admux
		andi		temp0,(1<<REFS1|1<<REFS0|1<<ADLAR|0<<MUX4|0<<MUX3|0<<MUX2|0<<MUX1|0<<MUX0)
		ori			temp0,(0<<REFS1|1<<REFS0|0<<ADLAR|0<<MUX4|0<<MUX3|0<<MUX2|1<<MUX1|0<<MUX0)	;AVCC with external capacitor at AREF pin
		out			admux,temp0	
		ret

adc_chan_3:
		in			temp0,admux
		andi		temp0,(1<<REFS1|1<<REFS0|1<<ADLAR|0<<MUX4|0<<MUX3|0<<MUX2|0<<MUX1|0<<MUX0)
		ori			temp0,(0<<REFS1|1<<REFS0|0<<ADLAR|0<<MUX4|0<<MUX3|0<<MUX2|1<<MUX1|1<<MUX0)	;AVCC with external capacitor at AREF pin
		out			admux,temp0	
		ret

adc_chan_4:
		in			temp0,admux
		andi		temp0,(1<<REFS1|1<<REFS0|1<<ADLAR|0<<MUX4|0<<MUX3|0<<MUX2|0<<MUX1|0<<MUX0)
		ori			temp0,(0<<REFS1|1<<REFS0|0<<ADLAR|0<<MUX4|0<<MUX3|1<<MUX2|0<<MUX1|0<<MUX0)	;AVCC with external capacitor at AREF pin
		out			admux,temp0	
		ret

adc_chan_5:
		in			temp0,admux
		andi		temp0,(1<<REFS1|1<<REFS0|1<<ADLAR|0<<MUX4|0<<MUX3|0<<MUX2|0<<MUX1|0<<MUX0)
		ori			temp0,(0<<REFS1|1<<REFS0|0<<ADLAR|0<<MUX4|0<<MUX3|1<<MUX2|0<<MUX1|1<<MUX0)	;AVCC with external capacitor at AREF pin
		out			admux,temp0	
		ret

adc_chan_6:
		in			temp0,admux
		andi		temp0,(1<<REFS1|1<<REFS0|1<<ADLAR|0<<MUX4|0<<MUX3|0<<MUX2|0<<MUX1|0<<MUX0)
		ori			temp0,(0<<REFS1|1<<REFS0|0<<ADLAR|0<<MUX4|0<<MUX3|1<<MUX2|1<<MUX1|0<<MUX0)	;AVCC with external capacitor at AREF pin
		out			admux,temp0	
		ret

adc_chan_7:
		in			temp0,admux
		andi		temp0,(1<<REFS1|1<<REFS0|1<<ADLAR|0<<MUX4|0<<MUX3|0<<MUX2|0<<MUX1|0<<MUX0)
		ori			temp0,(0<<REFS1|1<<REFS0|0<<ADLAR|0<<MUX4|0<<MUX3|1<<MUX2|1<<MUX1|1<<MUX0)	;AVCC with external capacitor at AREF pin
		out			admux,temp0	
		ret
;************************!!!!!!!!!!!!!!Achtung DifferenzKanäle Fussnote beachten im DB***************************************************
adc_chan_0_0_x10:
		in			temp0,admux
		andi		temp0,(1<<REFS1|1<<REFS0|1<<ADLAR|0<<MUX4|0<<MUX3|0<<MUX2|0<<MUX1|0<<MUX0)
		ori			temp0,(0<<REFS1|1<<REFS0|0<<ADLAR|0<<MUX4|1<<MUX3|0<<MUX2|0<<MUX1|0<<MUX0)	;AVCC with external capacitor at AREF pin
		out			admux,temp0	
		ret

adc_chan_1_0_x10:
		in			temp0,admux
		andi		temp0,(1<<REFS1|1<<REFS0|1<<ADLAR|0<<MUX4|0<<MUX3|0<<MUX2|0<<MUX1|0<<MUX0)
		ori			temp0,(0<<REFS1|1<<REFS0|0<<ADLAR|0<<MUX4|1<<MUX3|0<<MUX2|0<<MUX1|1<<MUX0)	;AVCC with external capacitor at AREF pin
		out			admux,temp0	
		ret

adc_chan_0_0_x200:
		in			temp0,admux
		andi		temp0,(1<<REFS1|1<<REFS0|1<<ADLAR|0<<MUX4|0<<MUX3|0<<MUX2|0<<MUX1|0<<MUX0)
		ori			temp0,(0<<REFS1|1<<REFS0|0<<ADLAR|0<<MUX4|1<<MUX3|0<<MUX2|1<<MUX1|0<<MUX0)	;AVCC with external capacitor at AREF pin
		out			admux,temp0	
		ret

adc_chan_1_0_x200:
		in			temp0,admux
		andi		temp0,(1<<REFS1|1<<REFS0|1<<ADLAR|0<<MUX4|0<<MUX3|0<<MUX2|0<<MUX1|0<<MUX0)
		ori			temp0,(0<<REFS1|1<<REFS0|0<<ADLAR|0<<MUX4|1<<MUX3|0<<MUX2|1<<MUX1|1<<MUX0)	;AVCC with external capacitor at AREF pin
		out			admux,temp0	
		ret

adc_chan_2_2_x10:
		in			temp0,admux
		andi		temp0,(1<<REFS1|1<<REFS0|1<<ADLAR|0<<MUX4|0<<MUX3|0<<MUX2|0<<MUX1|0<<MUX0)
		ori			temp0,(0<<REFS1|1<<REFS0|0<<ADLAR|0<<MUX4|1<<MUX3|1<<MUX2|0<<MUX1|0<<MUX0)	;AVCC with external capacitor at AREF pin
		out			admux,temp0	
		ret

adc_chan_3_2_x10:
		in			temp0,admux
		andi		temp0,(1<<REFS1|1<<REFS0|1<<ADLAR|0<<MUX4|0<<MUX3|0<<MUX2|0<<MUX1|0<<MUX0)
		ori			temp0,(0<<REFS1|1<<REFS0|0<<ADLAR|0<<MUX4|1<<MUX3|1<<MUX2|0<<MUX1|1<<MUX0)	;AVCC with external capacitor at AREF pin
		out			admux,temp0	
		ret

adc_chan_2_2_x200:
		in			temp0,admux
		andi		temp0,(1<<REFS1|1<<REFS0|1<<ADLAR|0<<MUX4|0<<MUX3|0<<MUX2|0<<MUX1|0<<MUX0)
		ori			temp0,(0<<REFS1|1<<REFS0|0<<ADLAR|0<<MUX4|1<<MUX3|1<<MUX2|1<<MUX1|0<<MUX0)	;AVCC with external capacitor at AREF pin
		out			admux,temp0	
		ret

adc_chan_3_2_x200:
		in			temp0,admux
		andi		temp0,(1<<REFS1|1<<REFS0|1<<ADLAR|0<<MUX4|0<<MUX3|0<<MUX2|0<<MUX1|0<<MUX0)
		ori			temp0,(0<<REFS1|1<<REFS0|0<<ADLAR|0<<MUX4|1<<MUX3|1<<MUX2|1<<MUX1|1<<MUX0)	;AVCC with external capacitor at AREF pin
		out			admux,temp0	
		ret
;***** x1fach
adc_chan_0_1:
		in			temp0,admux
		andi		temp0,(1<<REFS1|1<<REFS0|1<<ADLAR|0<<MUX4|0<<MUX3|0<<MUX2|0<<MUX1|0<<MUX0)
		ori			temp0,(0<<REFS1|1<<REFS0|0<<ADLAR|1<<MUX4|0<<MUX3|0<<MUX2|0<<MUX1|0<<MUX0)	;AVCC with external capacitor at AREF pin
		out			admux,temp0	
		ret

adc_chan_1_1:
		in			temp0,admux
		andi		temp0,(1<<REFS1|1<<REFS0|1<<ADLAR|0<<MUX4|0<<MUX3|0<<MUX2|0<<MUX1|0<<MUX0)
		ori			temp0,(0<<REFS1|1<<REFS0|0<<ADLAR|1<<MUX4|0<<MUX3|0<<MUX2|0<<MUX1|1<<MUX0)	;AVCC with external capacitor at AREF pin
		out			admux,temp0	
		ret

adc_chan_2_1:
		in			temp0,admux
		andi		temp0,(1<<REFS1|1<<REFS0|1<<ADLAR|0<<MUX4|0<<MUX3|0<<MUX2|0<<MUX1|0<<MUX0)
		ori			temp0,(0<<REFS1|1<<REFS0|0<<ADLAR|1<<MUX4|0<<MUX3|0<<MUX2|1<<MUX1|0<<MUX0)	;AVCC with external capacitor at AREF pin
		out			admux,temp0	
		ret

adc_chan_3_1:
		in			temp0,admux
		andi		temp0,(1<<REFS1|1<<REFS0|1<<ADLAR|0<<MUX4|0<<MUX3|0<<MUX2|0<<MUX1|0<<MUX0)
		ori			temp0,(0<<REFS1|1<<REFS0|0<<ADLAR|1<<MUX4|0<<MUX3|0<<MUX2|1<<MUX1|1<<MUX0)	;AVCC with external capacitor at AREF pin
		out			admux,temp0	
		ret

adc_chan_4_1:
		in			temp0,admux
		andi		temp0,(1<<REFS1|1<<REFS0|1<<ADLAR|0<<MUX4|0<<MUX3|0<<MUX2|0<<MUX1|0<<MUX0)
		ori			temp0,(0<<REFS1|1<<REFS0|0<<ADLAR|1<<MUX4|0<<MUX3|1<<MUX2|0<<MUX1|0<<MUX0)	;AVCC with external capacitor at AREF pin
		out			admux,temp0	
		ret

adc_chan_5_1:
		in			temp0,admux
		andi		temp0,(1<<REFS1|1<<REFS0|1<<ADLAR|0<<MUX4|0<<MUX3|0<<MUX2|0<<MUX1|0<<MUX0)
		ori			temp0,(0<<REFS1|1<<REFS0|0<<ADLAR|1<<MUX4|0<<MUX3|1<<MUX2|0<<MUX1|1<<MUX0)	;AVCC with external capacitor at AREF pin
		out			admux,temp0	
		ret

adc_chan_6_1:
		in			temp0,admux
		andi		temp0,(1<<REFS1|1<<REFS0|1<<ADLAR|0<<MUX4|0<<MUX3|0<<MUX2|0<<MUX1|0<<MUX0)
		ori			temp0,(0<<REFS1|1<<REFS0|0<<ADLAR|1<<MUX4|0<<MUX3|1<<MUX2|1<<MUX1|0<<MUX0)	;AVCC with external capacitor at AREF pin
		out			admux,temp0	
		ret

adc_chan_7_1:
		in			temp0,admux
		andi		temp0,(1<<REFS1|1<<REFS0|1<<ADLAR|0<<MUX4|0<<MUX3|0<<MUX2|0<<MUX1|0<<MUX0)
		ori			temp0,(0<<REFS1|1<<REFS0|0<<ADLAR|1<<MUX4|0<<MUX3|1<<MUX2|1<<MUX1|1<<MUX0)	;AVCC with external capacitor at AREF pin
		out			admux,temp0	
		ret

adc_chan_0_2:
		in			temp0,admux
		andi		temp0,(1<<REFS1|1<<REFS0|1<<ADLAR|0<<MUX4|0<<MUX3|0<<MUX2|0<<MUX1|0<<MUX0)
		ori			temp0,(0<<REFS1|1<<REFS0|0<<ADLAR|1<<MUX4|1<<MUX3|0<<MUX2|0<<MUX1|0<<MUX0)	;AVCC with external capacitor at AREF pin
		out			admux,temp0	
		ret

adc_chan_1_2:
		in			temp0,admux
		andi		temp0,(1<<REFS1|1<<REFS0|1<<ADLAR|0<<MUX4|0<<MUX3|0<<MUX2|0<<MUX1|0<<MUX0)
		ori			temp0,(0<<REFS1|1<<REFS0|0<<ADLAR|1<<MUX4|1<<MUX3|0<<MUX2|0<<MUX1|1<<MUX0)	;AVCC with external capacitor at AREF pin
		out			admux,temp0	
		ret

adc_chan_2_2:
		in			temp0,admux
		andi		temp0,(1<<REFS1|1<<REFS0|1<<ADLAR|0<<MUX4|0<<MUX3|0<<MUX2|0<<MUX1|0<<MUX0)
		ori			temp0,(0<<REFS1|1<<REFS0|0<<ADLAR|1<<MUX4|1<<MUX3|0<<MUX2|1<<MUX1|0<<MUX0)	;AVCC with external capacitor at AREF pin
		out			admux,temp0	
		ret

adc_chan_3_2:
		in			temp0,admux
		andi		temp0,(1<<REFS1|1<<REFS0|1<<ADLAR|0<<MUX4|0<<MUX3|0<<MUX2|0<<MUX1|0<<MUX0)
		ori			temp0,(0<<REFS1|1<<REFS0|0<<ADLAR|1<<MUX4|1<<MUX3|0<<MUX2|1<<MUX1|1<<MUX0)	;AVCC with external capacitor at AREF pin
		out			admux,temp0	
		ret

adc_chan_4_2:
		in			temp0,admux
		andi		temp0,(1<<REFS1|1<<REFS0|1<<ADLAR|0<<MUX4|0<<MUX3|0<<MUX2|0<<MUX1|0<<MUX0)
		ori			temp0,(0<<REFS1|1<<REFS0|0<<ADLAR|1<<MUX4|1<<MUX3|1<<MUX2|0<<MUX1|0<<MUX0)	;AVCC with external capacitor at AREF pin
		out			admux,temp0	
		ret

adc_chan_5_2:
		in			temp0,admux
		andi		temp0,(1<<REFS1|1<<REFS0|1<<ADLAR|0<<MUX4|0<<MUX3|0<<MUX2|0<<MUX1|0<<MUX0)
		ori			temp0,(0<<REFS1|1<<REFS0|0<<ADLAR|1<<MUX4|1<<MUX3|1<<MUX2|0<<MUX1|1<<MUX0)	;AVCC with external capacitor at AREF pin
		out			admux,temp0	
		ret

adc_chan_122V:
		in			temp0,admux
		andi		temp0,(1<<REFS1|1<<REFS0|1<<ADLAR|0<<MUX4|0<<MUX3|0<<MUX2|0<<MUX1|0<<MUX0)
		ori			temp0,(0<<REFS1|1<<REFS0|0<<ADLAR|1<<MUX4|1<<MUX3|1<<MUX2|1<<MUX1|0<<MUX0)	;AVCC with external capacitor at AREF pin
		out			admux,temp0	
		ret

adc_chan_gnd:
		in			temp0,admux
		andi		temp0,(1<<REFS1|1<<REFS0|1<<ADLAR|0<<MUX4|0<<MUX3|0<<MUX2|0<<MUX1|0<<MUX0)
		ori			temp0,(0<<REFS1|1<<REFS0|0<<ADLAR|1<<MUX4|1<<MUX3|1<<MUX2|1<<MUX1|1<<MUX0)	;AVCC with external capacitor at AREF pin
		out			admux,temp0	
		ret

AtMega16_analogcomparator.asm

Code:

;ACHTUNG man kann im simulator nicht mit PB2/3 simulieren geht nur
;wenn ACO händisch gesetzt wird ACO=1 wird auch ACI=1 um den int zu nutzen
;wenn man den int nicht nutzt ist die abfrage auf ACO 

AC_init:
		in			temp0,ACSR
		ori			temp0,(0<<ACD|0<<ACBG|1<<ACI|1<<ACIE|0<<ACIC|1<<ACIS1|0<<ACIS0)
		out			ACSR,temp0	
		in			temp0,SFIOR		;
		ori			temp0,(0<<ACME)	;ADC0-ADC7 nutzbar als negativ Input wenn ACME=1
		out			SFIOR,temp0	
		in			temp0,ADMUX
		ori			temp0,(0<<MUX2|0<<MUX1|0<<MUX0)	;nur nutzbar wenn ADC abgeschaltet ist ADEN=0
		out			ADMUX,temp0																	;+ messkanal0 (PC0) eingang
		
		sei						;
		ret

ac_change:
		sbis		ACSR,ACO
		rjmp		ac_change
		ret

ac_int:
		;wird aufgerufen wenn pb2+/pb3- pegelunterschiede feststellen
		reti

AtMega16_eeprom.asm

Code:

eeprom_init:
		ldi		temp0,(1<<EERIE)
		out		EECR,temp0
		sei
		ret

eeprom_rdy:
		;siehe eeprom_write ;** man kann in der wartezeit andere sachen erledigen
		;bis der int kommt, um dann weitere daten an den eeprom zum schreiben zu senden 
		;nur bei eeprom schreiben möglich
		reti

;Adreessierung im eeprom
adr_cnt:lds		temp0,eep_adrl
		inc		temp0
		cpi		temp0,$ff
		breq	adr_cnt2
		sts		eep_adrl,temp0
		ret
adr_cnt2:
		clr		temp0
		sts		eep_adrl,temp0
		lds		temp0,eep_adrh
		inc		temp0
		sts		eep_adrh,temp0
		cpi		temp0,$02
		breq	error_eeprom
		ret
error_eeprom:
		;voll
		ret

EEPROM_write:				
		sbic 	EECR,EEWE		;** falls eewe im eecr noch gesetzt
		rjmp 	EEPROM_write	;** spring zu zurück
		lds		r18,eep_adrh
		out 	EEARH, r18		;highbyte der adr
		lds		r17,eep_adrl
		out 	EEARL, r17		;lowbyte der adr
		out 	EEDR,r16		;zu speichernder wert
		sbi 	EECR,EEMWE		;sperrt eeprom master write enable
		sbi 	EECR,EEWE		;setze EEWE um eeprom zu schreiben
		ret

EEPROM_read:				
		sbic 	EECR,EEWE		;falls eewe im eecr noch gesetzt
		rjmp 	EEPROM_read		;springe zurück
		lds		r18,eep_adrh
		out 	EEARH, r18		;highbyte der adr
		lds		r17,eep_adrl
		out 	EEARL, r17		;lowbyte der adr
		sbi 	EECR,EERE		;sperrt lesen des eeproms
		in 		r16,EEDR		;zu lesender wert
		ret

AtMega16_ext_ints.asm

Code:

;PD2/3 sind INT0/1 / PB2 = INT2
INIT_EXT_INT012:
		in			temp0,MCUCR
		ori			temp0,(1<<ISC11|1<<ISC10|1<<ISC01|1<<ISC00) ;
		out			MCUCR,temp0

		in			temp0,MCUCSR
		ori			temp0,(1<<ISC2) ;
		out			MCUCSR,temp0

		in			temp0,GICR
		ori			temp0,(1<<INT2|1<<INT1|1<<INT0)	;beide INTs aktiv
		out			GICR,temp0

		sei			;global int
		ret

deak_INT012:
		in			temp0,GICR
		andi		temp0,(0<<INT2|0<<INT1|0<<INT0)			;beide INTs aktiv
		out			GICR,temp0
		ret

INT_0:	;hier steht das programm welches ausgeführt werden soll 
		reti

INT_1:	;hier steht das programm welches ausgeführt werden soll
		reti

INT_2:	;hier steht das programm welches ausgeführt werden soll
		reti