[ERLEDIGT] µC Tester (DSO) selber bauen (in Entwicklung)

Hallo!

In diesem Tread werde ich bisher ausprobierte Programmfragmente für die in glichnahmigen Tread im "Elektronik" Forum skizzierte Hardware posten. Falls nötig werden sie auf mehrere Posts verteilt.

MfG

Code:

; µC Tester (DSO) mit 40 MHz Quarzoszillator LIST P=18F252 include "P18F252.inc" CONFIG OSCS=OFF,OSC=ECIO,PWRT=ON,BOR=OFF,WDT=OFF,CCP2MUX=OFF,STVR=OFF,LVP=OFF,DEBUG=OFF CONFIG CP0=OFF,CP1=OFF,CP2=OFF,CP3=OFF,CPB=OFF,CPD=OFF,WRT0=OFF,WRT1=OFF,WRT2=OFF,WRT3=OFF CONFIG WRTB=OFF,WRTC=OFF,WRTD=OFF,EBTR0=OFF,EBTR1=OFF,EBTR2=OFF,EBTR3=OFF,EBTRB=OFF #define _C STATUS,C #define _Z STATUS,Z #define _DC STATUS,DC ;DB4 PORTA,0 ; O Display Data ;DB5 PORTA,1 ; O ;DB6 PORTA,2 ; O ;DB7 PORTA,3 ; O ; PORTA,4 ; I TOCKI, Frequenzeingang #define _RS PORTA,5 ; O Display RS #define _E PORTA,6 ; O Display Enable #define _INT0 PORTB,0 ; I ; PORTB,1 ; I Drehenkoder 1 ; PORTB,2 ; I Drehenkoder 2 #define _Key1 PORTB,3 ; I Taste 1 #define _Key2 PORTB,4 ; I Taste 2 ; PORTB,5 ; ? ; PORTB,6 ; ? ; PORTB,7 ; ? ; PORTC,0 ; I Schieberegister 74HC164 ; PORTC,1 ; I ; PORTC,2 ; I ; PORTC,3 ; I ; PORTC,4 ; I ; PORTC,5 ; I ; PORTC,6 ; I ; PORTC,7 ; I #define _Frs Flags,0 ; Display RS Flag #define _Finc Flags,1 #define _Fdec Flags,2 #define _Fcra Flags,3 #define _Fcrp Flags,4 #define _Fdca Flags,5 #define _Ferr Flags,6 #define _Fev Flags1,0 ; Encoder Geschwindigkeit 0=1x, 1=10x #define _Fmn Flags1,1 ; Menü 0=dieses, 1=nächstes #define _Ffm Flags1,3 ; 0=Funktion, 1=Menü A3 equ 0 ; Register für Hex_Dec Wandlung (A3 bis D0) A2 equ 1 A1 equ 2 A0 equ 3 B3 equ 4 B2 equ 5 B1 equ 6 B0 equ 7 C3 equ 8 C2 equ 9 C1 equ 0x0A C0 equ 0x0B D3 equ 0x0C D2 equ 0x0D D1 equ 0x0E D0 equ 0x0F Flags equ 10 Flags1 equ 11 Tmp equ 12 Tmp1 equ 13 Tmp2 equ 14 Tmp3 equ 15 Tmp4 equ 16 Tmp5 equ 17 ATmp equ 18 FTmp equ 19 HTmp equ 0x1A RTmp equ 0x1B MausA equ 0x1C MausB equ 0x1D MausC equ 0x1E SAL equ 0x1F SAH equ 20 DSAL equ 21 DSAH equ 22 TKC equ 23 PTmp equ 24 QTmp equ 25 org 0 call Init goto Main Main call EVtgl call Mouse call SADC call AdrOut call Displ4 bra Main Mouse movf PORTB,0 ; Encoder ablesen andlw 6 movwf MausB movwf MausC call MDel movf PORTB,0 andlw 6 movwf MausA xorwf MausC,1 btfsc _Z return movf MausB,1 btfsc _Z bra Mouse0 movf MausB,0 sublw 2 btfsc _Z bra Mouse1 movf MausB,0 sublw 4 btfsc _Z bra Mouse2 movf MausB,0 sublw 6 btfsc _Z bra Mouse3 return Mouse0 movf MausA,0 sublw 2 btfsc _Z bsf _Fdec movf MausA,0 sublw 4 btfsc _Z bsf _Finc return Mouse1 movf MausA,1 btfsc _Z bsf _Finc movf MausA,0 sublw 6 btfsc _Z bsf _Fdec return Mouse2 movf MausA,1 btfsc _Z bsf _Fdec movf MausA,0 sublw 6 btfsc _Z bsf _Finc return Mouse3 movf MausA,1 sublw 2 btfsc _Z bsf _Finc movf MausA,0 sublw 4 btfsc _Z bsf _Fdec return MDel movlw 0x80 ; Verzögerung ca. 10 ms (80) movwf Tmp MDel1 clrf Tmp1 MDel2 decfsz Tmp1,1 bra MDel2 decfsz Tmp,1 bra MDel1 return EVtgl btfsc _Key1 ; Encoder Geschwindigkeit umschalten return btfss _Key1 bra $-2 btg _Fev return MMtgl btfsc _Key1 ; Dieser Menüpunkt verlassen und in nächsten springen return btfss _Key1 bra $-2 btg _Fmn return Fmtgl btfsc _Key2 ; Funktion Verlassen und ins Hauptmenü Springen return btfss _Key2 bra $-2 btg _Ffm return SADC btfsc _Finc ; Sampleadresse Zähler bra SADup btfsc _Fdec bra SADdn return SADup btfss _Fev bra SAup movlw 0A movwf Tmp SAupL call SAup decfsz Tmp,1 bra SAupL return SAup movlw 7 cpfseq SAH call SAupd movlw 0xF2 cpfseq SAL call SAupd bra NoChg SAupd incf SAL,1 btfsc _C incf SAH,1 return SADdn btfss _Fev bra SAdn movlw 0A movwf Tmp SAdnL call SAdn decfsz Tmp,1 bra SAdnL return SAdn movlw 0 cpfseq SAH call SAdnd movlw 0 cpfseq SAL call SAdnd bra NoChg SAdnd decf SAL,1 btfss _C decf SAH,1 return NoChg bcf _Finc bcf _Fdec return AdrOut movff SAH,A1 movff SAL,A0 call Hex_Dec call Fst movf D1,0 call Val call Del call Snd movf D0,0 call Val call Del return Fst movlw 80 ; Anfangsadresse der ersten Zeile call Cmd call Del call Del return Snd movlw 0xC0 ; Anfangsadresse der zweiten Zeile call Cmd call Del call Del return Cmd bcf _Frs ; RS=0 movwf Tmp ; Befehl ins Tmp laden bra Send Val movwf Tmp1 ; Schicke Wert (0-FF) swapf Tmp1,0 call Num movf Tmp1,0 Num andlw 0F ; Schicke Ziffer (0-F) movwf Tmp movlw 0A subwf Tmp,0 btfsc _C addlw 7 addlw 3A Char bsf _Frs ; RS=1 movwf Tmp Send swapf Tmp,0 ; High Nibble andlw 0F movwf PORTA ; an Port (Display) schicken btfsc _Frs ; RS Flag ans Port kopieren bsf _RS bsf _E ; Enable erzeugen bra $+2 bra $+2 bra $+2 bra $+2 bra $+2 bcf _E movf Tmp,0 ; Low Nibble andlw 0F movwf PORTA ; an Port (Display) schicken Enab btfsc _Frs ; RS Flag ans Port kopieren bsf _RS bsf _E ; Enable erzeugen bra $+2 bra $+2 bra $+2 bra $+2 bra $+2 bcf _E Del clrf Tmp ; Verzögerung ca. 50µs decfsz Tmp,1 goto $-2 return Hex_Dec call CDClr ; Hex_Dec Wandlung, Hex>A, D>Dec movlw 1 movwf C0 movlw 0x18 ; 24 bit Hex (6 Ziffer) > 32 bit Dec (8 Ziffer) movwf HTmp Hex_DecL btfsc A0,0 call AddDC call CopyCB call AddCB call ARotRb decfsz HTmp,1 goto Hex_DecL call BCClr return BCClr movlw 8 movwf ATmp lfsr FSR0,B3 BCClrL clrf POSTINC0 decfsz ATmp,1 goto BCClrL return CDClr movlw 8 movwf ATmp lfsr FSR0,C3 CDClrL clrf POSTINC0 decfsz ATmp,1 goto CDClrL return CopyCB lfsr FSR0,C0 lfsr FSR1,B0 CopyReg movlw 4 movwf ATmp CopyRegL movff POSTDEC0,POSTDEC1 decfsz ATmp,1 goto CopyRegL return AddCB lfsr FSR0,B0 ; C+B>C lfsr FSR1,C0 goto AddReg AddDC lfsr FSR0,C0 ; D+C>D lfsr FSR1,D0 AddReg bcf _Ferr ; 32 bit, (4 Bytes) bcf _Fcrp movlw 4 movwf ATmp AddRegL bcf _Fcra movf INDF0,0 addwf INDF1,0 btfsc _C bsf _Fcra daw movwf INDF1 btfsc _C bsf _Fcra btfss _Fcrp goto AddRegN movlw 1 addwf INDF1,0 daw movwf INDF1 btfsc _C bsf _Fcra AddRegN bcf _Fcrp btfsc _Fcra bsf _Fcrp movf POSTDEC0,1 movf POSTDEC1,1 decfsz ATmp,1 goto AddRegL btfsc _Fcra bsf _Ferr return ARotRb lfsr FSR0,A2 ; A register 3 Bytes (24 bit) RRotRb movlw 3 ; rotiere A-Register 1 Bit rechts movwf RTmp bcf _Fcrp btfsc A0,0 bsf _Fcrp RRotRbL bcf _Fcra btfsc INDF0,0 bsf _Fcra bcf _C btfsc _Fcrp bsf _C rrcf INDF0,1 bcf _Fcrp btfsc _Fcra bsf _Fcrp movf POSTINC0,1 decfsz RTmp,1 goto RRotRbL return Displ1 movlw 82 ; 1. Zeile für 1 Kanal call Cmd ;call Del movlw 1 movwf FSR1H movff SAH,DSAH movff SAL,DSAL movlw 0E movwf Tmp4 Displ11L call GetSadr movlw 0 cpfsgt Tmp3 bra Displ011 movlw 1 cpfsgt Tmp3 bra Displ111 movlw 2 cpfsgt Tmp3 bra Displ211 movlw 3 cpfsgt Tmp3 bra Displ311 movlw 4 cpfsgt Tmp3 bra Displ411 movlw 5 cpfsgt Tmp3 bra Displ511 movlw 6 cpfsgt Tmp3 bra Displ611 movlw 7 cpfsgt Tmp3 bra Displ711 return Displ011 movlw 20 btfsc INDF1,0 movlw 5 movwf Tmp5 bra Displn11 Displ111 movlw 20 btfsc INDF1,1 movlw 5 movwf Tmp5 bra Displn11 Displ211 movlw 20 btfsc INDF1,2 movlw 5 movwf Tmp5 bra Displn11 Displ311 movlw 20 btfsc INDF1,3 movlw 5 movwf Tmp5 bra Displn11 Displ411 movlw 20 btfsc INDF1,4 movlw 5 movwf Tmp5 bra Displn11 Displ511 movlw 20 btfsc INDF1,5 movlw 5 movwf Tmp5 bra Displn11 Displ611 movlw 20 btfsc INDF1,6 movlw 5 movwf Tmp5 bra Displn11 Displ711 movlw 20 btfsc INDF1,7 movlw 5 movwf Tmp5 Displn11 movf Tmp5,0 call Char incf DSAL,1 btfsc _C incf DSAH,1 decfsz Tmp4,1 bra Displ11L call Del movlw 0xC2 ; 2. Zeile für 1 Kanal call Cmd ;call Del movlw 1 movwf FSR1H movff SAH,DSAH movff SAL,DSAL movlw 0E movwf Tmp4 Displ12L call GetSadr movlw 0 cpfsgt Tmp3 bra Displ012 movlw 1 cpfsgt Tmp3 bra Displ112 movlw 2 cpfsgt Tmp3 bra Displ212 movlw 3 cpfsgt Tmp3 bra Displ312 movlw 4 cpfsgt Tmp3 bra Displ412 movlw 5 cpfsgt Tmp3 bra Displ512 movlw 6 cpfsgt Tmp3 bra Displ612 movlw 7 cpfsgt Tmp3 bra Displ712 return Displ012 movlw 20 btfss INDF1,0 movlw 4 movwf Tmp5 bra Displn12 Displ112 movlw 20 btfss INDF1,1 movlw 4 movwf Tmp5 bra Displn12 Displ212 movlw 20 btfss INDF1,2 movlw 4 movwf Tmp5 bra Displn12 Displ312 movlw 20 btfss INDF1,3 movlw 4 movwf Tmp5 bra Displn12 Displ412 movlw 20 btfss INDF1,4 movlw 4 movwf Tmp5 bra Displn12 Displ512 movlw 20 btfss INDF1,5 movlw 4 movwf Tmp5 bra Displn12 Displ612 movlw 20 btfss INDF1,6 movlw 4 movwf Tmp5 bra Displn12 Displ712 movlw 20 btfss INDF1,7 movlw 4 movwf Tmp5 Displn12 movf Tmp5,0 call Char incf DSAL,1 btfsc _C incf DSAH,1 decfsz Tmp4,1 bra Displ12L call Del return Displ2 movlw 82 ; 1. Zeile für 2 Kanäle call Cmd movlw 1 movwf FSR1H movff SAH,DSAH movff SAL,DSAL movlw 0E movwf Tmp4 Displ21L call GetSadr movlw 0 cpfsgt Tmp3 bra Displ021 movlw 1 cpfsgt Tmp3 bra Displ121 movlw 2 cpfsgt Tmp3 bra Displ221 movlw 3 cpfsgt Tmp3 bra Displ321 movlw 4 cpfsgt Tmp3 bra Displ421 movlw 5 cpfsgt Tmp3 bra Displ521 movlw 6 cpfsgt Tmp3 bra Displ621 movlw 7 cpfsgt Tmp3 bra Displ721 return Displ021 movlw 4 btfsc INDF1,0 movlw 5 movwf Tmp5 bra Displn21 Displ121 movlw 4 btfsc INDF1,1 movlw 5 movwf Tmp5 bra Displn21 Displ221 movlw 4 btfsc INDF1,2 movlw 5 movwf Tmp5 bra Displn21 Displ321 movlw 4 btfsc INDF1,3 movlw 5 movwf Tmp5 bra Displn21 Displ421 movlw 4 btfsc INDF1,4 movlw 5 movwf Tmp5 bra Displn21 Displ521 movlw 4 btfsc INDF1,5 movlw 5 movwf Tmp5 bra Displn21 Displ621 movlw 4 btfsc INDF1,6 movlw 5 movwf Tmp5 bra Displn21 Displ721 movlw 4 btfsc INDF1,7 movlw 5 movwf Tmp5 Displn21 movf Tmp5,0 call Char incf DSAL,1 btfsc _C incf DSAH,1 decfsz Tmp4,1 bra Displ21L call Del movlw 0xC2 ; 2. Zeile für 2 Kanäle call Cmd movlw 2 movwf FSR1H movff SAH,DSAH movff SAL,DSAL movlw 0E movwf Tmp4 Displ22L call GetSadr movlw 0 cpfsgt Tmp3 bra Displ022 movlw 1 cpfsgt Tmp3 bra Displ122 movlw 2 cpfsgt Tmp3 bra Displ222 movlw 3 cpfsgt Tmp3 bra Displ322 movlw 4 cpfsgt Tmp3 bra Displ422 movlw 5 cpfsgt Tmp3 bra Displ522 movlw 6 cpfsgt Tmp3 bra Displ622 movlw 7 cpfsgt Tmp3 bra Displ722 return Displ022 movlw 4 btfsc INDF1,0 movlw 5 movwf Tmp5 bra Displn22 Displ122 movlw 4 btfsc INDF1,1 movlw 5 movwf Tmp5 bra Displn22 Displ222 movlw 4 btfsc INDF1,2 movlw 5 movwf Tmp5 bra Displn22 Displ322 movlw 4 btfsc INDF1,3 movlw 5 movwf Tmp5 bra Displn22 Displ422 movlw 4 btfsc INDF1,4 movlw 5 movwf Tmp5 bra Displn22 Displ522 movlw 4 btfsc INDF1,5 movlw 5 movwf Tmp5 bra Displn22 Displ622 movlw 4 btfsc INDF1,6 movlw 5 movwf Tmp5 bra Displn22 Displ722 movlw 4 btfsc INDF1,7 movlw 5 movwf Tmp5 Displn22 movf Tmp5,0 call Char incf DSAL,1 btfsc _C incf DSAH,1 decfsz Tmp4,1 bra Displ22L call Del return Displ4 movlw 82 ; 1. Zeile für 4 Kanäle call Cmd movlw 1 movwf FSR1H movlw 2 movwf FSR2H movff SAH,DSAH movff SAL,DSAL movlw 0E movwf Tmp4 Displ41L call GetSadr movff FSR1L,FSR2L movlw 0 cpfsgt Tmp3 bra Displ041 movlw 1 cpfsgt Tmp3 bra Displ141 movlw 2 cpfsgt Tmp3 bra Displ241 movlw 3 cpfsgt Tmp3 bra Displ341 movlw 4 cpfsgt Tmp3 bra Displ441 movlw 5 cpfsgt Tmp3 bra Displ541 movlw 6 cpfsgt Tmp3 bra Displ641 movlw 7 cpfsgt Tmp3 bra Displ741 return Displ041 clrf Tmp5 btfsc INDF1,0 bsf Tmp5,0 btfsc INDF2,0 bsf Tmp5,1 bra Displn41 Displ141 clrf Tmp5 btfsc INDF1,1 bsf Tmp5,0 btfsc INDF2,1 bsf Tmp5,1 bra Displn41 Displ241 clrf Tmp5 btfsc INDF1,2 bsf Tmp5,0 btfsc INDF2,2 bsf Tmp5,1 bra Displn41 Displ341 clrf Tmp5 btfsc INDF1,3 bsf Tmp5,0 btfsc INDF2,3 bsf Tmp5,1 bra Displn41 Displ441 clrf Tmp5 btfsc INDF1,4 bsf Tmp5,0 btfsc INDF2,4 bsf Tmp5,1 bra Displn41 Displ541 clrf Tmp5 btfsc INDF1,5 bsf Tmp5,0 btfsc INDF2,5 bsf Tmp5,1 bra Displn41 Displ641 clrf Tmp5 btfsc INDF1,6 bsf Tmp5,0 btfsc INDF2,6 bsf Tmp5,1 bra Displn41 Displ741 clrf Tmp5 btfsc INDF1,7 bsf Tmp5,0 btfsc INDF2,7 bsf Tmp5,1 Displn41 movf Tmp5,0 call Char incf DSAL,1 btfsc _C incf DSAH,1 decfsz Tmp4,1 bra Displ41L call Del movlw 0xC2 ; 2. Zeile für 4 Kanäle call Cmd movlw 3 movwf FSR1H movlw 4 movwf FSR2H movff SAH,DSAH movff SAL,DSAL movlw 0E movwf Tmp4 Displ42L call GetSadr movff FSR1L,FSR2L movlw 0 cpfsgt Tmp3 bra Displ042 movlw 1 cpfsgt Tmp3 bra Displ142 movlw 2 cpfsgt Tmp3 bra Displ242 movlw 3 cpfsgt Tmp3 bra Displ342 movlw 4 cpfsgt Tmp3 bra Displ442 movlw 5 cpfsgt Tmp3 bra Displ542 movlw 6 cpfsgt Tmp3 bra Displ642 movlw 7 cpfsgt Tmp3 bra Displ742 return Displ042 clrf Tmp5 btfsc INDF1,0 bsf Tmp5,0 btfsc INDF2,0 bsf Tmp5,1 bra Displn42 Displ142 clrf Tmp5 btfsc INDF1,1 bsf Tmp5,0 btfsc INDF2,1 bsf Tmp5,1 bra Displn42 Displ242 clrf Tmp5 btfsc INDF1,2 bsf Tmp5,0 btfsc INDF2,2 bsf Tmp5,1 bra Displn42 Displ342 clrf Tmp5 btfsc INDF1,3 bsf Tmp5,0 btfsc INDF2,3 bsf Tmp5,1 bra Displn42 Displ442 clrf Tmp5 btfsc INDF1,4 bsf Tmp5,0 btfsc INDF2,4 bsf Tmp5,1 bra Displn42 Displ542 clrf Tmp5 btfsc INDF1,5 bsf Tmp5,0 btfsc INDF2,5 bsf Tmp5,1 bra Displn42 Displ642 clrf Tmp5 btfsc INDF1,6 bsf Tmp5,0 btfsc INDF2,6 bsf Tmp5,1 bra Displn42 Displ742 clrf Tmp5 btfsc INDF1,7 bsf Tmp5,0 btfsc INDF2,7 bsf Tmp5,1 Displn42 movf Tmp5,0 call Char incf DSAL,1 btfsc _C incf DSAH,1 decfsz Tmp4,1 bra Displ42L call Del return GetSadr movf DSAL,0 andlw 7 movwf Tmp3 movff DSAL,FSR1L rrncf FSR1L,1 rrncf FSR1L,1 rrncf FSR1L,1 movlw 1F andwf FSR1L btfsc DSAH,0 bsf FSR1L,5 btfsc DSAH,1 bsf FSR1L,6 btfsc DSAH,2 bsf FSR1L,7 return Init clrf ADCON0 ; Schalte ADC aus movlw 7 ; und mache movwf ADCON1 ; A0-7 zum digital I/O bcf INTCON2,7 ; PORTB pull-ups einschalten lfsr FSR0,0 ; alle GPS Register löschen (00-7Fh) ClsL clrf POSTINC0 btfss FSR0L,7 bra $-4 movlw 10 movwf TRISA ; I/O's festlegen setf TRISB setf TRISC clrf PORTA ; alle Ports initialisieren clrf PORTB clrf PORTC movlw 2 ; Display auf 4-bit umschalten und initialisieren movwf PORTA call Enab movlw 28 ; 4 bit, 2 Zeilen, 5x7 Punkten call Cmd movlw 0C ; display an, cursor aus, nicht blinken call Cmd movlw 6 ; incrementieren, nicht schieben call Cmd movlw 40 ; Zeichen selbst definieren call Cmd movlw 0 ; 0. call Char movlw 0 call Char movlw 1F call Char movlw 0 call Char movlw 0 call Char movlw 0 call Char movlw 1F call Char movlw 0 call Char movlw 1F ; 1. call Char movlw 0 call Char movlw 0 call Char movlw 0 call Char movlw 0 call Char movlw 0 call Char movlw 1F call Char movlw 0 call Char movlw 0 ; 2. call Char movlw 0 call Char movlw 1F call Char movlw 0 call Char movlw 1F call Char movlw 0 call Char movlw 0 call Char movlw 0 call Char movlw 1F ; 3. call Char movlw 0 call Char movlw 0 call Char movlw 0 call Char movlw 1F call Char movlw 0 call Char movlw 0 call Char movlw 0 call Char movlw 0 ; 4. call Char movlw 0 call Char movlw 0 call Char movlw 0 call Char movlw 0 call Char movlw 0 call Char movlw 1F call Char movlw 0 call Char movlw 1F ; 5. call Char movlw 0 call Char movlw 0 call Char movlw 0 call Char movlw 0 call Char movlw 0 call Char movlw 0 call Char movlw 0 call Char movlw 0 ; 6. call Char movlw 7 call Char movlw 4 call Char movlw 4 call Char movlw 4 call Char movlw 4 call Char movlw 1C call Char movlw 0 call Char movlw 0 ; 7. call Char movlw 1C call Char movlw 4 call Char movlw 4 call Char movlw 4 call Char movlw 4 call Char movlw 7 call Char movlw 0 call Char lfsr FSR0,100 ; Rechtecke in RAM schreiben, Bank 1 clrf Tmp movlw 0xAA movwf Tmp1 WRAM1L movff Tmp1,POSTINC0 decfsz Tmp,1 bra WRAM1L lfsr FSR0,200 ; Bank 2 clrf Tmp movlw 0xCC movwf Tmp1 WRAM2L movff Tmp1,POSTINC0 decfsz Tmp,1 bra WRAM2L lfsr FSR0,300 ; Bank 3 clrf Tmp movlw 0xF0 movwf Tmp1 WRAM3L movff Tmp1,POSTINC0 decfsz Tmp,1 bra WRAM3L lfsr FSR0,400 ; Bank 4 clrf Tmp movlw 0 movwf Tmp1 WRAM4L movff Tmp1,POSTINC0 comf Tmp1,1 decfsz Tmp,1 bra WRAM4L return end